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BQ40Z50-R1 Fiches technique(PDF) 34 Page - Texas Instruments |
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BQ40Z50-R1 Fiches technique(HTML) 34 Page - Texas Instruments |
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34 / 56 page ![]() bq40z50-R1 SLUSCB3 – JULY 2015 www.ti.com Figure 28. System Present Pull-Down Resistor Because the System Present signal is part of the pack connector interface to the outside world, it must be protected from external electrostatic discharge events. An integrated ESD protection on the PRES device pin reduces the external protection requirement to just R29 for an 8-kV ESD contact rating. However, if it is possible that the System Present signal may short to PACK+, then R28 and D4 must be included for high-voltage protection. Figure 29. System Present ESD and Short Protection 9.2.2.2.4 SMBus Communication The SMBus clock and data pins have integrated high-voltage ESD protection circuits, however, adding a Zener diode (D2 and D3) and series resistor (R24 and R26) provides more robust ESD performance. 34 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: bq40z50-R1 |
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