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PIC16F1507-E/SS. Fiches technique(PDF) 66 Page - Microchip Technology |
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PIC16F1507-E/SS. Fiches technique(HTML) 66 Page - Microchip Technology |
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66 / 278 page ![]() PIC16(L)F1507 DS40001586D-page 66 2011-2015 Microchip Technology Inc. REGISTER 7-3: PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2 U-0 U-0 U-0 U-0 U-0 R/W-0/0 U-0 U-0 — — — — — NCO1IE — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-3 Unimplemented: Read as ‘0’ bit 2 NCO1IE: Numerically Controlled Oscillator Interrupt Enable bit 1 = Enables the NCO interrupt 0 = Disables the NCO interrupt bit 1-0 Unimplemented: Read as ‘0’ Note: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt. |
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