PIC16F1507-ESLASHSS. datasheet(204/278 Pages) MICROCHIP

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PIC16(L)F1507

DS40001586D-page 204

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SWAPF

Swap Nibbles in f

Syntax:

[ label ]

SWAPF f,d

Operands:

 f  127

 [0,1]

Operation:

(f<3:0>)

 (destination<7:4>),

(f<7:4>)

 (destination<3:0>)

Status Affected:

None

Description:

The upper and lower nibbles of regis-

ter ‘f’ are exchanged. If ‘d’ is ‘0’, the

result is placed in the W register. If ‘d’

is ‘1’, the result is placed in register ‘f’.

TRIS

Load TRIS Register with W

Syntax:

[ label ] TRIS f

Operands:

 f  7

Operation:

(W)

 TRIS register ‘f’

Status Affected:

None

Description:

Move data from W register to TRIS

When ‘f’ = 5, TRISA is loaded.

When ‘f’ = 6, TRISB is loaded.

When ‘f’ = 7, TRISC is loaded.

XORLW

Exclusive OR literal with W

Syntax:

[ label ]

XORLW k

Operands:

k 255

Operation:

(W) .XOR. k

W)

Status Affected:

Description:

The contents of the W register are

XOR’ed with the 8-bit

literal ‘k’. The result is placed in the

W register.

XORWF

Exclusive OR W with f

Syntax:

[ label ]

XORWF

f,d

Operands:

 f  127

 [0,1]

Operation:

(W) .XOR. (f)

destination)

Status Affected:

Description:

Exclusive OR the contents of the W

result is stored in the W register. If ‘d’

is ‘1’, the result is stored back in regis-

ter ‘f’.

PIC16F1507-E/SS. Fiches technique(PDF) 204 Page - Microchip Technology

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