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M24C64-R Fiches technique(PDF) 7 Page - STMicroelectronics |
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M24C64-R Fiches technique(HTML) 7 Page - STMicroelectronics |
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7 / 54 page ![]() DS6638 Rev 36 7/54 M24C64-W M24C64-R M24C64-F M24C64-DF Description 53 Figure 3. UFDFPN5 (DFN5) package connections 1. Inputs E2, E1, E0 are not connected, therefore read as (000). Please refer to Section 2.3 for further explanations. Figure 4. WLCSP 4 bump ultra thin package connections 1. Inputs E2, E1, E0 are read as (000). Please refer to Section 2.3 for further explanations. Figure 5. WLCSP 5-bump connections (M24C64-FCS6TP/K) 1. Inputs E2, E1, E0 are internally connected to (001). Please refer to Section 2.3 for further explanations. Table 2. WLCSP 4-bump signals vs. bump position Position A B 1VCC SCL 2VSS SDA |
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