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ST7263BDX Fiches technique(PDF) 48 Page - STMicroelectronics |
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ST7263BDX Fiches technique(HTML) 48 Page - STMicroelectronics |
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48 / 145 page ![]() ST7263BDx ST7263BHx ST7263BKx ST7263BE 48/145 16-bit timer (Cont’d) Figure 28. Counter timing diagram, internal clock divided by 2 Figure 29. Counter timing diagram, internal clock divided by 4 Figure 30. Counter timing diagram, internal clock divided by 8 Note: The MCU is in reset state when the internal reset signal is high, when it is low the MCU is running. CPU CLOCK FFFD FFFE FFFF 0000 0001 0002 0003 INTERNAL RESET TIMER CLOCK COUNTER REGISTER TIMER OVERFLOW FLAG (TOF) FFFC FFFD 0000 0001 CPU CLOCK INTERNAL RESET TIMER CLOCK COUNTER REGISTER TIMER OVERFLOW FLAG (TOF) CPU CLOCK INTERNAL RESET TIMER CLOCK COUNTER REGISTER TIMER OVERFLOW FLAG (TOF) FFFC FFFD 0000 |
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