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SPSB100 Fiches technique(PDF) 130 Page - STMicroelectronics

No de pièce SPSB100
Description  Automotive power management IC for highly integrated processors
PDF  214 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPSB100 Fiches technique(HTML) 130 Page - STMicroelectronics

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Bit
Name
Description
22 MASK_BUCK3_PG_TIMEOUT_IRQ
Mask BUCK PG timeout interruption when turned on by SPI command
When turned on by a power-up sequence, IRQ is never masked
1: IRQ signal is not generated
0: IRQ signal is generated (default)
21
MASK_BUCK3_OC_IRQ
Mask BUCK over current interruption
1: IRQ signal is not generated
0: IRQ signal is generated (default)
20
MASK_BUCK3_PG_IRQ
Mask BUCK power-good interruption when turned ON through SPI
1: IRQ signal is not generated
0: IRQ signal is generated when the regulator is turned ON through SPI (default)
19
MASK_BUCK3_IRQ
Mask BUCK interruption for over voltage, undervoltage and for buck internal OV or
UV in high or low power
1: IRQ signal is not generated
0: IRQ signal is generated (default)
18 MASK_BUCK2_PG_TIMEOUT_IRQ
Mask BUCK PG timeout interruption when turned on by SPI command
When turned on by power-up sequence, IRQ is never masked
1: IRQ signal is not generated
0: IRQ signal is generated (default)
17
MASK_BUCK2_OC_IRQ
Mask BUCK over current interruption
1: IRQ signal is not generated
0: IRQ signal is generated (default)
16
MASK_BUCK2_PG_IRQ
reserved
Table 91. DCR6 (0x06)
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
0 (R/W)
MASK_BUCK2_IRQ
MASK_BUCK1_PG_TIMEOUT_IRQ
MASK_BUCK1_OC_IRQ
MASK_BUCK1_PG_IRQ
MASK_BUCK1_IRQ
MASK_FBB_OV_IRQ
MASK_FBB_UV_IRQ
MASK_FBB_OV_EW_IRQ
Mask BUCK2 interrupt
bit
Mask BUCK1 PG timeout interrupt bit
Mask BUCK1 overcurrent
interrupt bit
Mask BUCK1 PG interrupt
bit
Mask BUCK1 interrupt
bit
Mask FBB overvoltage
interrupt bit
Mask FBB undervoltage
interrupt bit
Mask FBB overvoltage early
warning interrupt bit
Table 92. DCR6 (0x06) description
Bit
Name
Description
15
MASK_BUCK2_IRQ
Mask BUCK interruption for over voltage, undervoltage and for buck internal OV or
UV in high or low power
1: IRQ signal is not generated
0: IRQ signal is generated (default)
14 MASK_BUCK1_PG_TIMEOUT_IRQ
Mask BUCK PG timeout interruption when turned on by SPI command
When turned on by a power-up sequence, IRQ is never masked
1: IRQ signal is not generated
0: IRQ signal is generated (default)
13
MASK_BUCK1_OC_IRQ
Mask BUCK overcurrent interruption
1: IRQ signal is not generated
0: IRQ signal is generated (default)
12
MASK_BUCK1_PG_IRQ
Mask BUCK power-good interruption when turned ON through SPI
1: IRQ signal is not generated
SPSB100
SPI registers
DS14640 - Rev 1
page 130/214



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