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PCF5083H/5V2/F3 Fiches technique(PDF) 64 Page - NXP Semiconductors |
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PCF5083H/5V2/F3 Fiches technique(HTML) 64 Page - NXP Semiconductors |
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64 / 136 page ![]() 1996 Oct 29 64 Philips Semiconductors Objective specification GSM signal processing IC PCF5083 The MP_CONTROL_BUFF may be used to control several features of the DSP. It consists of 4 parameter fields as given in Tables 56 and 57. Table 56 Contents of MP_CONTROL_BUFF Table 57 Associated I/O pins Note 1. If proc_trace_buff[1] is 0, then IO3 is set on errors. OFFSET DESCRIPTION 0 time-out_freq: ECLK input frequency divided by 10 kHz. After reset time-out_freq is set to 3 (32.768 kHz clock). 1 eclk_cycle_count: contains number of ECLK cycles spent most recently called procedure. Required for test purposes only. 2 to 4 proc_trace_buff[2]: for debugging purposes the DSP provides a procedure trace facility. The IDs of the procedures to be traced must be stored in proc_trace_buff. If any of these procedures is executing, its corresponding I/O pin (see Table 57) is set to a logic 0. LOCATION I/O PIN DEFAULT AFTER RESET proc_trace_buff[0] IO2 17 CP_rx_normal_burst proc_trace_buff[1] IO3 00 trace errors; note 1 |
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