CS43L21 datasheet(41/63 Pages) CIRRUS

41 / 63 page

DS723A1

CS43L21

Function:

Divides the input MCLK by 2 prior to all internal circuitry. This bit is ignored when the AUTO bit is disabled

in Slave Mode.

6.4

Interface Control (Address 04h)

Master/Slave Mode (M/S)

Default: 0

0 - Slave

1 - Master

Function:

Selects either master or slave operation for the serial port.

DAC Digital Interface Format (DAC_DIF[2:0])

Default = 000

Function:

Selects the digital interface format used for the data in on SDIN. The required relationship between the

Left/Right clock, serial clock and serial data is defined by the Digital Interface Format and the options are

detailed in the section “Digital Interface Formats” on page 30.

6.5

DAC Output Control (Address 08h)

Headphone Analog Gain (HP_GAIN[2:0])

Default: 011

432

Reserved

M/S

DAC_DIF2

DAC_DIF1

DAC_DIF0

Reserved

DAC_DIF[2:0]

Description

Figure

000

Left-Justified, up to 24-bit data

15 on page 31

001

I²S, up to 24-bit data

14 on page 30

010

Right-Justified, 24-bit data

17 on page 3217 on page 32

011

Right-Justified, 20-bit data

17 on page 3217 on page 32

100

Right-Justified, 18-bit data

17 on page 3217 on page 32

101

Right-Justified, 16-bit data

17 on page 3217 on page 32

110

Reserved

100

Reserved

432

HP_GAIN2

HP_GAIN1

HP_GAIN0

DAC_

SNGVOL

INV_PCMB

INV_PCMA

DACB_MUTE DACA_MUTE

HP_GAIN[2:0]

Gain Setting

000

0.3959

001

0.4571

010

0.5111

011

0.6047

100

0.7099

101

0.8399

110

1.0000

111

1.1430

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