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January 18, 2011

CPS-10Q

CPS-10Q Datasheet

2010 Integrated Device Technology, Inc. All rights reserved.

Media Gateway and general processing

Figure 2 Application Overview

Note: The CPS-10Q provides direct support for backplane connections using the serial RapidIO standard.

A low jitter switch enables fully DSP processing power. Priority support, fast switching, and multicasting will differentiate class of traffic to provide QoS.

6 Functional Overview

The CPS-10Q is optimized for either board-level DSP/ASIC cluster applications or module-level distributed processing application. Up to 16 serial

RapidIO ports fully meet standard v1.3. The physical lanes may be configured to operate at 3.125Gbps, 2.5Gbps or 1.25Gbps. All lanes independently

work in short haul or long haul. The switch has a sustained 80Gbps bandwidth. It is non-blocking within a given sRIO priority.

The CPS-10Q can be programmed through a CPU or a DSP connected to one of the sRIO ports of the device or with a CPU connected to an I2C or

JTAG bus, it can also work along with a I2C configuration memory. This option allows the device work in “remote stand alone” mode.

Each sRIO port provides a packet trace capability. For any packet received by a port, a comparison between the first 160 bits and up to four configu-

rable values can be performed. A match against any of these parameters will result in a copy of the packet and a route of the packet to a configurable

ouput port. This feature can be used as a tactical function to track user data or in a debug environment to test how specific packets are moving

through the platform.