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BLUENRG-332VC Fiches technique(PDF) 62 Page - STMicroelectronics |
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BLUENRG-332VC Fiches technique(HTML) 62 Page - STMicroelectronics |
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62 / 67 page ![]() Contents 1 Introduction .......................................................................5 2 Functional overview ...............................................................6 2.1 System architecture ............................................................ 6 2.2 Arm Cortex-M0+ core with MPU .................................................. 7 2.3 Memories ..................................................................... 7 2.3.1 Embedded flash memory .................................................. 7 2.3.2 Embedded SRAM ........................................................ 7 2.3.3 Embedded ROM ......................................................... 7 2.3.4 Embedded OTP ......................................................... 7 2.3.5 Memory protection unit (MPU) .............................................. 8 2.4 Security and safety ............................................................. 8 2.5 RF subsystem ................................................................. 8 2.5.1 RF front-end block diagram................................................. 8 2.5.2 IPDs for BlueNRG-LPS .................................................... 9 2.6 Power supply management ..................................................... 10 2.6.1 SMPS step-down regulator ................................................ 10 2.6.2 Power supply schemes ................................................... 10 2.6.3 Linear voltage regulators.................................................. 11 2.6.4 Power supply supervisor .................................................. 11 2.7 Operating modes.............................................................. 12 2.7.1 RUN mode ............................................................ 12 2.7.2 DEEPSTOP mode....................................................... 12 2.7.3 SHUTDOWN mode ...................................................... 14 2.8 Reset management............................................................ 14 2.9 Clock management ............................................................ 15 2.10 Boot mode ................................................................... 17 2.11 Embedded UART bootloader.................................................... 17 2.12 General purpose inputs/outputs (GPIO) .......................................... 17 2.13 Direct memory access (DMA) ................................................... 17 2.14 Nested vectored interrupt controller (NVIC) ........................................ 18 2.15 Analog digital converter (ADC) .................................................. 18 2.15.1 Temperature sensor ..................................................... 18 2.16 True random number generator (RNG) ........................................... 19 2.17 Timers and watchdog .......................................................... 19 2.17.1 General-purpose timers (TIM2, TIM16, TIM17) ................................. 19 BlueNRG-LPS Contents DS13819 - Rev 4 page 62/67 |
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