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MPC855T Fiches technique(PDF) 32 Page - NXP Semiconductors

No de pièce MPC855T
Description  MPC860 PowerQUICC Family Hardware Specifications
PDF  77 Pages
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Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

MPC855T Fiches technique(HTML) 32 Page - NXP Semiconductors

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MPC860 PowerQUICC Family Hardware Specifications, Rev. 10
32
Freescale Semiconductor
Bus Signal Timing
Figure 20 provides the timing for the synchronous external master access controlled by the GPCM.
Figure 20. Synchronous External Master Access Timing (GPCM Handled ACS = 00)
Figure 21 provides the timing for the asynchronous external master memory access controlled by the
GPCM.
Figure 21. Asynchronous External Master Memory Access Timing (GPCM Controlled—ACS = 00)
Figure 22 provides the timing for the asynchronous external master control signals negation.
Figure 22. Asynchronous External Master—Control Signals Negation Timing
CLKOUT
TS
A[0:31],
TSIZ[0:1],
R/W, BURST
CSx
B41
B42
B40
B22
CLKOUT
AS
A[0:31],
TSIZ[0:1],
R/W
CSx
B39
B40
B22
AS
CSx, WE[0:3],
OE, GPLx,
BS[0:3]
B43



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