MIC2133 datasheet(16/50 Pages) MICROCHIP

16 / 50 page

 2022 Microchip Technology Inc. and its subsidiaries

DS20006653B-page 16

MIC2133

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in the following table.

TABLE 3-1:

PIN FUNCTION TABLE

Number

Symbol

Description

CSN2

Current Sense Return pin for Phase 2. Connect Kelvin connection from the low-side FET

source to CSN2 to avoid ground drops due to high current.

CSP2

Current Sense Positive pin for Phase 2. Connect Kelvin connection from the low-side FET

drain to CSP2 to avoid ground drops due to high current.

CSN1

Current Sense Return pin for Phase 1. Connect Kelvin connection from the low-side FET

source to CSN1 to avoid ground drops due to high current.

CSP1

Current Sense Positive pin for Phase 1. Connect Kelvin connection from the low-side FET

drain to CSP1 to avoid ground drops due to high current.

ILIM

Current Limit Adjust Input pin. Connect a resistor from ILIM to AGND to set the current limit.

Refer to Section 4.5.4 “Current Limit” for more details. Both channels share the same

current limit threshold.

CSH

Average Current Sense Voltage Output pin. Used for current sharing; see Section 4.5.1

“Current Balancing between Phases”, Section 4.5.11 “Adaptive Voltage Positioning

(AVP), Also Known as Droop Function (Recommended for CCM Only)” and

Section 4.5.13 “Telemetry Knobs”. Connect 100 pF from CSH to AGND.

Active-High Enable Input pin. 75V compatible with 1.2V precise threshold. Pull EN to GND to

disable the buck converter output. Connect to VIN for always-on operation. EN can be used

for power sequencing and as a UVLO adjustment input. For a precision UVLO, put an

appropriate sized resistor divider from VIN to AGND and tie the midpoint to the EN pin.

VIN

Input Voltage to Controller pin. Connect to VIN through 1.21Ω resistor. Connect 1 µF

capacitor from this pin to PGND.

VDD

5V LDO Output pin. Bias supply for the MIC2133 control logic circuit. Connect a minimum

2.2 µF low-ESR ceramic capacitor from VDD to AGND.

AGND

Analog Ground pin. Reference node for all control logic circuits inside the MIC2133.

Connect AGND to PGND at one point.

EXTVDD

Auxiliary LDO Input pin. Connect to a supply higher than 4.7V (typ.) to bypass the internal

high-voltage 5V LDO or leave unconnected/connect to ground when the EXTVDD pin is

not used. Connect a 2.2 µF low-ESR ceramic capacitor between EXTVDD and AGND.

EXTVDD can be connected to an external supply.

PSH

Phase Shedding Threshold Programming pin. Connect a resistor from PSH to AGND. The

voltage drop across the resistor decides the phase shedding threshold.

TEMP

Die Junction Temperature Sense Output pin from Internal Diode. Connect a 1 µF capacitor

from the TEMP pin to AGND.

OUTS

Output Voltage Sense pin. It is required to connect the OUTS pin to output through a 10 kΩ

resistor and decouple to ground with a 100 nF capacitor for VOUT ≤ 5V. For VOUT > 5V, it is

required to connect the OUTS pin through a resistive divider from VOUT to AGND. The

OUTS pin will set the correct frequency adaptive to output voltage.

Gate Driver Output pin for Output OVP Discharge MOSFET. One single event of overvoltage

over the OVP upper threshold for a duration longer than 12 µs sets DR = High. The

MIC2133 has to be restarted by EN or VIN cycling.

BST1

Phase 1 Bootstrap Capacitor Connection pin. BST1 pin is the supply voltage input for the

Phase 1 high-side MOSFET driver. Connect a 0.1 µF low-ESR ceramic capacitor between

the BST1 pin and the SW1 pin.

DH1

Phase 1 High-Side Gate Driver Output pin. Connect DH1 to the Phase 1 high-side

MOSFET gate.

SW1

Phase 1 Switch Node Output pin. Connect one terminal of the Phase 1 inductor to the

SW1 node.

MIC2133 Fiches technique(PDF) 16 Page - Microchip Technology

MIC2133 Fiches technique(HTML) 16 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

Fiches technique Télécharger

Lien URL