MIC2133 datasheet(18/50 Pages) MICROCHIP

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DS20006653B-page 18

MIC2133

4.0

FUNCTIONAL DESCRIPTION

4.1

Control Architecture

The MIC2133 is an adaptive on-time, dual phase, syn-

chronous step-down DC/DC controller. It is designed to

operate over a wide 8V to 75V input voltage range and

provides a regulated output voltage. An adaptive on-time

control scheme is employed in order to obtain a constant

switching frequency and simplify the control compensa-

tion.

The MIC2133 has a differential remote sense amplifier

with unity gain for sensing output voltage. The differen-

tial remote sense amplifier helps regulate the output

voltage at target level, over the entire load range, by

avoiding parasitic voltage drops on the PCB. The out-

put of the differential amplifier will be used as output

voltage to the controller. The output voltage is sensed

across the MIC2133 device's feedback remote sense

FBS pin and the ground feedback remote sense GFB

pin via the voltage divider, and compared to a 0.6V ref-

erence voltage VREF at a low-gain transconductance

(gm) amplifier. The output of the gm amplifier, Vgm, is,

then, further compared with another 1.2V reference,

VREF_COM, at the error comparator. If the feedback volt-

age decreases and the output of the gm amplifier is

below 1.2V, then the error comparator will trigger the

control logic and generate an on-time period. The

on-time period length is predetermined by the TON1 and

TON2 generation circuitries for Phase 1 and Phase 2,

respectively.

EQUATION 4-1:

The internal logic starts maintaining the same switching

frequency and phasing for each phase (180° for two

phases).

Figure 4-1 shows the MIC2133 control loop timing

during steady-state operation. During steady-state

operation, the gm amplifier senses the feedback volt-

age ripple, which is proportional to the output voltage

ripple and the external ripple from the RIP_INJ pin,

injected to the FBS node at the turn-on instant of each

phase. When the output of the gm error amplifier falls

below the reference voltage, the on-time period is

triggered. The on-time of Phase 1 is determined by the

TON1 generator. The Phase 1 TON1 generator also

includes the current sharing error between phases. The

Phase 1 high-side driver turns on the Phase 1 high-side

FET during TON1.

The Phase 1 high-side FET turn-off instant depends on

both the TON estimation and current sharing error. At

the end of Phase 1 TON1, the internal high-side driver

turns off the Phase 1 high-side FET and the low-side

driver turns on the Phase 1 low-side FET. The Phase 1

off-time period length depends upon the feedback volt-

age error in the next cycle for Phase 1. When the output

of the gm error amplifier falls below the reference volt-

age in the second cycle, the Phase 2 on-time period is

triggered. The on-time of Phase 2 is determined by the

TON2 generator. The Phase 2 TON2 generator also

includes the current sharing error between phases. The

Phase 2 high-side driver turns on the Phase 2 high-side

FET during TON2. The high-side FET turn-off instant

depends on both the TON estimation and current shar-

ing error. At the end of Phase 2 TON2, the internal

high-side driver turns off the Phase 2 high-side FET

and the low-side driver turns on the Phase 2 low-side

FET. The duration of the Phase 2 off-time period

depends upon the feedback voltage error in the next

Phase 2 cycle. The above cycles repeat in a

daisy-chain ring, and both phases support the load cur-

rent alternately and maintain output voltage. In

steady-state operation, TON1 = TON2, TOFF1 = TOFF2

and this way, the resulting phase difference is 180

degrees.

If the off-time period determined by the feedback volt-

age is less than the Minimum Off-Time, TOFF(MIN),

which is about 360 ns, then the MIC2133 control logic

will apply the TOFF(MIN) instead to either phase. The

minimum TOFF(MIN) period is required to maintain

enough energy in the Boost Capacitor (CBST) to drive

the high-side MOSFET.

The maximum duty cycle is obtained from the 360 ns

TOFF(MIN):

EQUATION 4-2:

It is not recommended to use the MIC2133 with

an off-time close to TOFF(MIN) during steady-state

operation. It is recommended that Equation 4-2 be

used to choose the TS for a lower switching frequency

when the DMAX is reached if VIN is very close to VOUT,

knowing that the buck converter duty cycle equals

VOUT divided by VIN.

The actual on-time and the resulting switching

frequency will vary with the part-to-part variation in the

rise and fall times of the external MOSFETs, the output

load current and the variations in the VDD voltage. Also,

the minimum TON results in a lower switching

frequency in high VIN to VOUT applications, such as

28V to 1.0V.

TON EST



VOUT

VIN fSW



-----------------------

Where:

VOUT = Output Voltage

VIN = Power Stage Input Voltage

fSW = Switching Frequency of Each Phase

DMAX

TS TOFF MIN



–

--------------------------------------

360 ns

---------------

–

Where:

TS =1/fSW

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