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M25PE20 Fiches technique(PDF) 6 Page - STMicroelectronics

No de pièce M25PE20
Description  1 and 2 Mbit, Low Voltage, Page-Erasable Serial Flash Memories with Byte-Alterability, 33 MHz SPI Bus, Standard Pin-out
PDF  37 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M25PE20 Fiches technique(HTML) 6 Page - STMicroelectronics

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SPI MODES
These devices can be driven by a microcontroller
with its SPI peripheral running in either of the two
following modes:
–
CPOL=0, CPHA=0
–
CPOL=1, CPHA=1
For these two modes, input data is latched in on
the rising edge of Serial Clock (C), and output data
is available from the falling edge of Serial Clock
(C).
The difference between the two modes, as shown
in Figure 5., is the clock polarity when the bus
master is in Standby mode and not transferring da-
ta:
–
C remains at 0 for (CPOL=0, CPHA=0)
–
C remains at 1 for (CPOL=1, CPHA=1)
Figure 4. Bus Master and Memory Devices on the SPI Bus
Note: The Top Sector Lock (TSL) signal should be driven, High or Low as appropriate.
Figure 5. SPI Modes Supported
AI10741B
Bus Master
(ST6, ST7, ST9,
ST10, Others)
SPI Memory
Device
SDO
SDI
SCK
CQD
S
SPI Memory
Device
CQD
S
SPI Memory
Device
CQD
S
CS3
CS2
CS1
SPI Interface with
(CPOL, CPHA) =
(0, 0) or (1, 1)
TSL RP
TSL RP
TSL RP
AI01438B
C
MSB
CPHA
D
0
1
CPOL
0
1
Q
C
MSB



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