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STM32L062C8U6DTR Fiches technique(PDF) 23 Page - STMicroelectronics |
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STM32L062C8U6DTR Fiches technique(HTML) 23 Page - STMicroelectronics |
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23 / 124 page ![]() DS10183 Rev 11 23/124 STM32L062x8 Functional overview 36 • Clock security system (CSS) This feature can be enabled by software. Another clock security system can be enabled, in case of failure of the LSE it provides an interrupt or wakeup event which is generated if enabled. • Clock-out capability (MCO: microcontroller clock output) It outputs one of the internal clocks for external use by the application. Several prescalers allow the configuration of the AHB frequency, each APB (APB1 and APB2) domains. The maximum frequency of the AHB and the APB domains is 32 MHz. See Figure 2 for details on the clock tree. |
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