FDA803D datasheet(16/78 Pages) STMICROELECTRONICS

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Electrical specifications

FDA803D

16/78

DocID031487 Rev 2

I2S bus interface

VIL-I2S

I2S pins low voltage

0.8

Input logic current, low

VI = 0 V

500

VIH-I2S

I2S pins high voltage

1.3

Input logic current, high

VI = TBD

500

Control pins characteristics

VENL

Enable pins low voltage -

0.9

VENH

Enable pins high voltage -

2.4

Clipping and offset detector

CDTHD

Clip det THD (6)

THD @ 100 Hz with average

Vclipdet = 2 V

CDSAT

Clip det sat. voltage

CD on; ICD = 1 mA

150

300

CDLK

Clip det leakage current CD pin at 3.6 V

μA

Vofflin

Input DC offset

detection threshold

Theshold at which an offset present at inputs

is detected

-18

Voffout

Output DC offset

detection threshold(7)

Input high pass filter disable

±1.4

±2

±2.6

1. If outphase modulation selected, slow slope configuration must be used (IB11,D3)

2. Parameter values based on bench measurements (guaranteed by correlation with overvoltage shutdown).

3. The thermal warnings are always in tracking.

4. When selecting the low gain, also the thresholds for "DC diagnostic" function and "Open load in play detector" function

scale of the same factor with respect to standard gain configuration.

5. See Chapter 8: Muting function architecture for more details.

6. Guaranteed by correlation.

7. Measured at bench during product validation.

Table 5. Electrical characteristics (continued)

Symbol

Parameter

Test condition

Min

Typ

Max

Unit

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