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ADP5070 Fiches technique(PDF) 17 Page - Analog Devices |
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ADP5070 Fiches technique(HTML) 17 Page - Analog Devices |
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17 / 17 page ![]() Data Sheet ADP5073 Rev. A | Page 17 of 17 OUTLINE DIMENSIONS 0.30 0.23 0.18 1.75 1.60 SQ 1.45 3.10 3.00 SQ 2.90 1 0.50 BSC BOTTOM VIEW TOP VIEW 16 5 8 9 12 13 4 0.50 0.40 0.30 0.05 MAX 0.02 NOM 0.20 REF 0.20 MIN COPLANARITY 0.08 PIN 1 INDICATOR 0.80 0.75 0.70 COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. SEATING PLANE SIDE VIEW EXPOSED PAD PIN 1 INDICATOR AREA OPTIONS (SEE DETAIL A) DETAIL A (JEDEC 95) FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. Figure 27. 16-Lead Lead Frame Chip Scale Package [LFCSP] 3 mm × 3 mm Body and 0.75 mm Package Height (CP-16-22) Dimensions shown in millimeters ORDERING GUIDE Model1 Temperature Range Package Description Package Option Branding Code ADP5073ACPZ-R7 −40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP] CP-16-22 LR1 ADP5073CP-EVALZ Evaluation Board 1 Z = RoHS Compliant Part. ©2015–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D12817-0-10/17(A) |
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