DP8496 datasheet(6/92 Pages) NSC

6 / 92 page

20 Pin Description (Continued)

Symbol

Type

Function

PROCESSOR INTERFACE PINS

(Continued)

RDY or

The function of this pin is determined by the state of the CRST pin

MODE

READY

(CRST Pin Deasserted) When low this output indicates that the Buffer Memory Data

processor’s wait-state input Refer to Section 428 for a more complete description of this option

This pin is only active while in the NSCIntel mode This pin will be driven low internally while in

the ZilogMotorola mode

MODE

(CRST Pin Asserted) This input will determine the processor access mode of the

DP84967 If this pin is left floating or pulled or driven high while CRST is asserted the

NationalIntel mode will be enabled If this pin is pulled or driven low while CRST is asserted the

ZilogMotorola mode will be enabled

While CRST is asserted an internal pull-up resister is active See the DC specifications for

characteristics

DINT

DISK INTERRUPT

This active low output will be asserted on any Disk Data Controller condition

enabled by the Disk Interrupt Enable register If the CI (Combine Interrupts) bit in the Setup 3

Controller interrupt occurs

SINT

SCSI INTERRUPT

This active low output will be asserted on any SCSI Bus Controller condition

enabled by the SCSI Interrupt Enable register

BCLK

BUS CLOCK

This input is used by the Buffer Memory Interface for access timing and DMA

arbitration It is also used by the SCSI Bus Controller for timing

SCSI BUS CONTROLLER PINS

(All SCSI Signals are Active High on the DP8497)

SDB07

57–59

I O

SCSI DATA PARITY BUS

These nine active low open drain bi-directional lines should be

connected directly to the SCSI data bus

SDBP

61–63

65–67

BSY

BUSY

Same as above Should be connected to SCSI control bus

SEL

SELECT

Same as above

COMMANDDATA

Same as above

INPUTOUTPUT

Same as above

REQ

REQUEST

Same as above

ACK

ACKNOWLEDGE

Same as above

ATN

ATTENTION

Same as above

MSG

MESSAGE

Same as above

RST

SCSI RESET

If CRST is asserted during power-up the RST pin will not produce a glitch See

AC Specifications for input de-glitch description

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