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DP8496 Fiches technique(PDF) 39 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No de pièce DP8496
Description  SCSI-2 Disk Data Controller
PDF  92 Pages
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Fabricant  NSC [National Semiconductor (TI)]
Site Internet  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8496 Fiches technique(HTML) 39 Page - National Semiconductor (TI)

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40 Functional Description (Continued)
44 SCSI INTERFACE
Primary among the objectives for the SCSI interface is to
simplify
the
microprocessor’s
interaction
with
the
DP84967 The most complex portion of SCSI related code
is usually dedicated to interrupt handling whether vectored
or polled In the DP84967 the multi-phase commands and
combination commands help to reduce the number of inter-
rupts and to pre-define the reason for those interrupts which
do occur An interrupt mask register enables the software to
control interrupt flow Also a physically separate pin dedi-
cated for SCSI interrupts (SINT) can shorten the processor
response time The chip is also capable of operating in ei-
ther the target mode for which it is optimized or the initiator
mode
The SCSI Port can be controlled by the processor by utiliz-
ing the DP84967 in one of two different modes Automatic
or Manual Automatic mode enables the SCSI Command
register and the state machines which make up the SCSI
protocol engine to interpret and perform multi-phase or
combination commands
Manual mode disables the SCSI Command register and
SCSI protocol engine The processor must then manipulate
both the SCSI control and data bus through programmed
IO The SCSI Control register and the SCSI Data register
are the windows into the SCSI bus which allow this manipu-
lation
The DP84967 may be switched between the Automatic
and Manual modes of operation There are a few restric-
tions however and these are detailed in the SCSI Opera-
tion register description in Section 442
The DP8496 provides 48 mA single-ended transceivers on
all SCSI bus signal pins so the bus lines can be driven
directly The DP8497 version is designed to interface with
differential transceivers external to the chip for Fast SCSI
applications Therefore on the DP8497 all SCSI outputs are
the standard 2 mA type Fourteen additional pins on the
DP8497 provide direction control for the external differential
transceivers In the manual mode of operation the user
controls the transceiver direction by programming two regis-
ters SDIF1 and SDIF2 (4Eh and 4Fh) Also note that on the
DP8497 all SCSI signals are active high
441 Simple SCSI Operations
The flowchart in
Figure 411 describes how to implement
simple SCSI operations such as reading data from the disk
and writing data to the disk This flowchart has been kept
quite simple The next section describes the various regis-
ters that the user must program in order to configure and
control the SCSI Controller’s operation More advanced
SCSI operations are then described in Section 443
442 SCSI Registers
SCSI Command (SCMD)
40h
W Only
76543210
SCSI Command Opcode
While in Automatic mode writing an opcode to this register
will initiate a SCSI command Normally other SCSI registers
are configured before writing to this register After the prop-
er registers are loded writing to this register will initiate the
operation Invalid opcodes should NEVER be issued After
any invalid opcode is written to this register the DP84967
should be reset with the CRST pin
In general SCSI commands cannot be pipelined The combi-
nation commands eliminate the need for most pipelining
New commands should be written to the SCSI Command
register only after the previous command has completed its
operation as indicated by its completion interrupt See Sec-
tion 443 for a description of certain commands that may be
pipelined
SCSI commands which transfer information blocks may be
extended however If a new value is written to the SCSI
Block Count register the command will continue by down-
loading the new holding register value to the active SCSI
Block Count register when the current active contents
reaches zero This is described in Section 443
39



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