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LP5910 Fiches technique(PDF) 3 Page - Texas Instruments

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No de pièce LP5910
Description  LP5910 300-mA Low-Noise, Low-IQ LDO
PDF  31 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

LP5910 Fiches technique(HTML) 3 Page - Texas Instruments

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5 Pin Configuration and Functions
EN
OUT
GND
IN
A2
B2
A1
B1
Figure 5-1. YKA Package, 4-Pin Ultra-Thin DSBGA,
Top View
EN
OUT
GND
IN
A2
B2
A1
B1
Figure 5-2. YKA Package, 4-Pin Ultra-Thin DSBGA,
Bottom View
1
2
3
6
5
4
OUT
NC
GND
IN
NC
EN
Figure 5-3. DRV Package, 6-Pin WSON With Thermal Pad, Top View
Table 5-1. Pin Functions
PIN
I/O
DESCRIPTION
NAME
DSBGA
WSON
EN
B1
4
I
Enable input; disables the regulator when logic low. Enables the regulator when logic
high. An internal 1-MΩ pull down resistor connects this input to ground.
GND
B2
5
—
Common ground
IN
A1
6
I
Voltage supply input. A 1-μF capacitor must be connected at this input.
NC
—
2, 3
—
No internal connection. Connect to ground or leave open.
OUT
A2
1
O
Voltage output. A 1-µF low-ESR capacitor must be connected from this pin to the
GND pin. Connect this output to the load circuit.
Exposed Pad
—
Thermal Pad
—
The exposed thermal pad on the bottom of the package must be connected to a
copper area under the package on the PCB. Connect to ground potential or leave
floating. Do not connect to any potential other than the same ground potential seen at
device pin 5 (GND). See the Power Dissipation section for more information.
www.ti.com
LP5910
SNVSA91F – SEPTEMBER 2015 – REVISED APRIL 2021
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: LP5910



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