TMUX7411F datasheet(27/30 Pages) TI

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12 Layout

12.1 Layout Guidelines

Figure 12-1 and Figure 12-2 illustrates an example of a PCB layout with the TMUX7412F. The following are

some key considerations:

• Decouple the VDD and VSS pins with a 1-µF capacitor, placed as close to the pin as possible. Make sure that

the capacitor voltage rating is sufficient for the VDD and VSS supplies.

• Multiple decoupling capacitors can be used if their is a lot of noise in the system. For example, a 0.1-µF and

1-µF can be placed on the supply pins. If multiple capacitors are used, placing the lowest value capacitor

closest to the supply pin is recommended.

• Keep the input lines as short as possible.

• Use a solid ground plane to help distribute heat and reduce electromagnetic interference (EMI) noise pickup.

• Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if

possible, and only make perpendicular crossings when necessary.

12.2 Layout Example

SEL1

VSS

TMUX741xF

VDD

SEL2

SEL3

GND

SEL4

Wide (low inductance)

trace for power

Wide (low inductance)

trace for power

Via to ground plane

To Pull-up resistor

Figure 12-1. TSSOP Layout Example

VSS

VDD

GND

Via to ground plane

Via to power plane

To Pull-up resistor

Figure 12-2. WQFN Layout Example

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TMUX7411F, TMUX7412F, TMUX7413F

SCDS404 – MARCH 2021

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TMUX7411F Fiches technique(PDF) 27 Page - Texas Instruments