STUSB4710ADTR datasheet(2/34 Pages) STMICROELECTRONICS

2 / 34 page

Contents

STUSB4710

2/34

DocID030499 Rev 4

Contents

Functional description .................................................................... 4

Inputs/outputs ................................................................................. 5

2.1

Pinout................................................................................................ 5

2.2

Pin list ............................................................................................... 7

2.3

Pin description................................................................................... 8

2.3.1

CC1 / CC2 .......................................................................................... 8

2.3.2

I2C interface pins ................................................................................ 8

2.3.3

VBUS_SENSE.................................................................................... 8

2.3.4

VBUS_EN_SRC ................................................................................. 9

2.3.5

VDD .................................................................................................... 9

2.3.6

GND.................................................................................................... 9

2.3.7

ADDR0................................................................................................ 9

2.3.8

VREG2V7 ........................................................................................... 9

2.3.9

VBUS_DISCH..................................................................................... 9

2.3.10

SEL_PDO [5:2] ................................................................................... 9

Block descriptions ........................................................................ 10

3.1

CC interface .................................................................................... 10

3.2

BMC ................................................................................................ 10

3.3

Protocol layer .................................................................................. 10

3.4

Policy engine................................................................................... 10

3.5

Device policy manager .................................................................... 11

3.6

VBUS power path control ................................................................ 11

3.6.1

VBUS monitoring .............................................................................. 11

3.6.2

VBUS discharge ............................................................................... 11

3.6.3

VBUS power path assertion ............................................................. 12

3.7

High voltage protection ................................................................... 12

3.8

Hardware fault management ........................................................... 12

3.9

Accessory mode detection .............................................................. 13

3.9.1

Audio accessory mode detection ..................................................... 13

3.9.2

Debug accessory mode detection .................................................... 13

User-defined startup configuration.............................................. 14

4.1

Parameter overview ........................................................................ 14

4.2

PDO

– voltage configuration in NVM............................................... 14

4.3

PDO

– current configuration in NVM ............................................... 15

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