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AW9203 Fiches technique(PDF) 8 Page - Shanghai awinic technology co.,ltd |
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AW9203 Fiches technique(HTML) 8 Page - Shanghai awinic technology co.,ltd |
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8 / 30 page ![]() AW9203 June 2018 V1.2 www.awinic.com.cn 8 Copyright © 2016 SHANGHAI AWINIC TECHNOLOGY CO., LTD 8 I2C INTERFACE TIMING Parameter Name MIN TYP MAX UNIT FSCL Interface Clock frequency 400 kHz TDEGLITCH Deglitch time SCL 200 ns SDA 250 ns THD:STA (Repeat-start) Start condition hold time 0.6 μs TLOW Low level width of SCL 1.3 μs THIGH High level width of SCL 0.6 μs TSU:STA (Repeat-start) Start condition setup time 0.6 μs THD:DAT Data hold time 0 μs TSU:DAT Data setup time 0.1 μs TR Rising time of SDA and SCL 0.3 μs TF Falling time of SDA and SCL 0.3 μs TSU:STO Stop condition setup time 0.6 μs TBUF Time between start and stop condition 1.3 μs SDA SCL tBUF tLOW tHD:STA tHD:DAT tR tHIGH tF tSU:DAT tSP tSU:STO VIH VIL Stop Stop Start Start VIH VIL tSU:STA |
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