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AR8327-AL1A-R Fiches technique(PDF) 64 Page - List of Unclassifed Manufacturers

No de pièce AR8327-AL1A-R
Description  Seven-port Gigabit Ethernet Switch
PDF  394 Pages
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Fabricant  ETC2 [List of Unclassifed Manufacturers]
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AR8327-AL1A-R Fiches technique(HTML) 64 Page - List of Unclassifed Manufacturers

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64 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch
Atheros Communications, Inc.
64 • June 2011
COMPANY CONFIDENTIAL
3.2.6
GLOBAL_INT0
Address 0x0020
SFT&HW RST
Table 3-9 summarizes the GLOBAL_INT0 register.
9:8
R/W
1
RESERVED
7
R/W
0
SERDES_AEN
SerDes auto negotiation disable
0 = enable auto negotiation
1 = disable auto negotiation
6R/W
0
RESERVED
5R/W
1
RESERVED
4:0
R/W
0
RESERVED
Table 3-8.
Power-on Strapping Register
Bit
R/W
Inital
Value
Mnemonic
Description
Table 3-9.
Global Interrupt Register 0
Bit
R/W
Inital
Value
Mnemonic
Description
31:30
R/O
0
RESERVED
29
R/W1C
0
ACL_INI_INT
Interrupt when ACL memory initial done.
28
R/W1C
0
LOOKUP_INI_INT
Interrupt when address table initial
done.(including ARL, Reserved ARL,
VLAN)
27
R/W1C
0
QM_INI_INT
Interrupt when qm memory initial done.
26
R/W1C
0
MIB_INI_INT
Interrupt when mib memory initial done.
25
R/W1C
0
OFFLOAD_INI_INT
Interrupt when OFFLOAD memory initial
done.
24
R/W1C
0
HARDWARE_INI_DONE
Interrupt when hardware memory initial
done.
23
R/W1C
0
ACL_MATCH_INT
Interrupt when acl match(and
acl_match_int_en in acl result is 1'b1)
22
R/W1C
0
ARL_DONE_INT
Interrupt when Address table was accessed
done by CPU.
21
R/W1C
0
ARL_CPU_FULL_INT
Interrupt when CPU load a new address in
address table, but the address's two entries
are all valid.
20
R/W1C
0
VT_DONE_INT
VLAN table was accessed done by CPU.
19
R/W1C
0
MIB_DONE_INT
MIB accesse done by cpu.
18
R/W1C
0
ACL_DONE_INT
Interrupt when ACL access done by CPU
17
R/W1C
0
OFFLOAD_DONE_INT
Interrupt when OFFLOAD table access done
by CPU
16
R/W1C
0
OFFLOAD_CPU_FULL_DO
NE_INT
Interrupt when CPU load a new entry in
HNAT table, but the OFFLOAD's entries are
all valid.



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