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PSD833F2 Fiches technique(PDF) 97 Page - STMicroelectronics |
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PSD833F2 Fiches technique(HTML) 97 Page - STMicroelectronics |
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97 / 110 page ![]() 97/110 PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2 Table 67. VSTBYON Timing (5V devices) Note: 1. VSTBYON timing is measured at VCC ramp rate of 2 ms. Table 68. VSTBYON Timing (3V devices) Note: 1. VSTBYON timing is measured at VCC ramp rate of 2 ms. Symbol Parameter Conditions Min Typ Max Unit tBVBH VSTBY Detection to VSTBYON Output High (Note 1) 20 µs tBXBL VSTBY Off Detection to VSTBYON Output Low (Note 1) 20 µs Symbol Parameter Conditions Min Typ Max Unit tBVBH VSTBY Detection to VSTBYON Output High (Note 1) 20 µs tBXBL VSTBY Off Detection to VSTBYON Output Low (Note 1) 20 µs |
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