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MSP432P411VIPZ Fiches technique(PDF) 188 Page - Texas Instruments |
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MSP432P411VIPZ Fiches technique(HTML) 188 Page - Texas Instruments |
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188 / 212 page ![]() PJ.3/HFXIN PJSEL0.3 PJDIR.3 PJIN.3 EN To modules DVSS PJOUT.3 1 0 DVSS DVCC 1 D To HFXT XIN Pad Logic Bus Keeper Direction 0: Input 1: Output PJREN.3 0 1 0 0 1 0 1 1 PJSEL1.3 0 1 0 0 1 0 1 1 DVSS DVSS 188 MSP432P4111, MSP432P4011, MSP432P411Y MSP432P401Y, MSP432P411V, MSP432P401V SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018 www.ti.com Submit Documentation Feedback Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V Detailed Description Copyright © 2017–2018, Texas Instruments Incorporated Functional representation only. Figure 6-23. Port PJ (PJ.3) Port Schematic |
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