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AD9856/PCB Fiches technique(PDF) 30 Page - Analog Devices |
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AD9856/PCB Fiches technique(HTML) 30 Page - Analog Devices |
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30 / 37 page ![]() AD9856 Rev. C | Page 29 of 36 SYMBOL DEFINITION MIN tPRE SETUP TIME 30ns tSCLK PERIOD OF SERIAL DATA CLOCK 100ns tDSU SERIAL DATA SETUP TIME 30ns tSCLKPWH SERIAL DATA CLOCK PULSEWIDTH HIGH 40ns tSCLKPWL SERIAL DATA CLOCK PULSEWIDTH LOW 40ns tDHLD SERIAL DATA HOLD TIME 0ns CS SCLK SDIO 1ST BIT 2ND BIT tDSU tDHLD tSCLKPWH tSCLKPWL tSCLK tPRE CS Figure 48. Timing Diagram for Data Write to AD9856 SYMBOL DEFINITION MAX tDV DATA VALID TIME 30ns CS SCLK SDIO 1ST BIT 2ND BIT tDV SDO Figure 49. Timing Diagram for Read from AD9856 |
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