M95040-DF datasheet(8/46 Pages) STMICROELECTRONICS

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Signal description

M950x0-W M950x0-R M950x0-DF

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Signal description

During all operations, VCC must be held stable and within the specified valid range:

VCC(min) to VCC(max).

All of the input and output signals can be held high or low (according to voltages of VIH, VOH,

VIL or VOL, as specified in Table 16: DC characteristics (M950x0-W, device grade 6) and

Table 17: DC characteristics (M950x0-R or M95040-DF, device grade 6). These signals are

described next.

2.1

Serial Data Output (Q)

This output signal transfers data serially out of the device. Data is shifted out on the falling

edge of Serial Clock (C).

2.2

Serial Data Input (D)

This input signal transfers data serially into the device. It receives instructions, addresses,

and the data to be written. Values are latched on the rising edge of Serial Clock (C).

2.3

Serial Clock (C)

This input signal provides the timing of the serial interface. Instructions, addresses, or data

present at Serial Data Input (D) are latched on the rising edge of Serial Clock (C). Data on

Serial Data Output (Q) changes after the falling edge of Serial Clock (C).

2.4

Chip Select (S)

When this input signal is high, the device is deselected and Serial Data Output (Q) is at high

impedance. Unless an internal Write cycle is in progress, the device will be in the Standby

Power mode. Driving Chip Select (S) low selects the device, placing it in the Active Power

mode.

After Power-up, a falling edge on Chip Select (S) is required prior to the start of any

instruction.

2.5

Hold (HOLD)

The Hold (HOLD) signal is used to pause any serial communications with the device without

deselecting the device.

During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data

Input (D) and Serial Clock (C) are Don’t Care.

To start the Hold condition, the device must be selected, with Chip Select (S) driven low.

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