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M950X0-W Fiches technique(PDF) 20 Page - STMicroelectronics |
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M950X0-W Fiches technique(HTML) 20 Page - STMicroelectronics |
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20 / 46 page ![]() Instructions M950x0-W M950x0-R M950x0-DF 20/46 DocID6512 Rev 13 6.3.3 BP1, BP0 bits The Block Protect (BP1, BP0) bits are non-volatile. They define the size of the area to be software protected against Write instructions. These bits are written with the Write Status Register (WRSR) instruction. When one or both of the Block Protect (BP1, BP0) bits is set to 1, the relevant memory area (as defined in Table 3: Write-protected block size) becomes protected against Write (WRITE) instructions. The Block Protect (BP1, BP0) bits can be written provided that the Hardware Protected mode has not been set. Figure 9. Read Status Register (RDSR) sequence C D S 2 1 3456789 10 11 12 13 14 15 Instruction 0 AI01444D Q 7 6543210 Status Register Out High Impedance MSB 7 6543210 Status Register Out MSB 7 |
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