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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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STM32L476RC Fiches technique(PDF) 33 Page - STMicroelectronics |
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STM32L476RC Fiches technique(HTML) 33 Page - STMicroelectronics |
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33 / 232 page  DocID025976 Rev 4 33/232 STM32L476xx Functional overview 55 interrupt is generated if enabled. LSE failure can also be detected and generated an interrupt. • Clock-out capability: – MCO: microcontroller clock output: it outputs one of the internal clocks for external use by the application – LSCO: low speed clock output: it outputs LSI or LSE in all low-power modes (except VBAT). Several prescalers allow to configure the AHB frequency, the high speed APB (APB2) and the low speed APB (APB1) domains. The maximum frequency of the AHB and the APB domains is 80 MHz. |
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