STBCFG01 datasheet(25/37 Pages) STMICROELECTRONICS

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STBCFG01

I²C compatible interface registers

DocID026474 Rev 3

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Write this bit to 0 to clear the alarm. If the alarm condition is still active a new

alarm is triggered only on the following rising edge of the alarm condition (the

alarm condition has to disappear and then appear again).

ALRM_VBAT: low battery voltage alarm



0: battery voltage above threshold



1: low battery voltage

Write this bit to 0 to clear the alarm. If the alarm condition is still active a new

alarm is triggered only on the following rising edge of the alarm condition (the

alarm condition has to disappear and then appear again).

Table 9: SOC register LSB (register address: 02h)

POR

R/W

SOC[7:0]

00h

R/W

Table 10: SOC register MSB (register address: 03h)

b15

B14

b13

b12

b11

b10

POR

R/W

SOC[15:8]

00h

R/W

SOC register LSb: 1/512% SOC

Table 11: VBAT register LSB (register address: 08h)

POR

R/W

VBAT[7:0]

00h

Table 12: VBAT register MSB (register address: 09h)

b15

B14

b13

b12

b11

b10

POR

R/W

Reserved

VBAT[10:8]

00h

VBAT register LSb: 2.69 mV

Table 13: OCV register LSB (register address: 0Dh)

POR

R/W

OCV[7:0]

00h

Table 14: OCV register MSB (register address: 0Eh)

b15

B14

b13

b12

b11

b10

POR

R/W

Reserved

OCV[12:8]

00h

OCV register LSb: 0.67 mV

Table 15: VM_CNF register LSB (register address: 11h)

POR

R/W

VM_CNF[7:0]

41h

R/W

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