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ADP7182ACPZ-R7 Fiches technique(PDF) 19 Page - Analog Devices |
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ADP7182ACPZ-R7 Fiches technique(HTML) 19 Page - Analog Devices |
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19 / 31 page ![]() Data Sheet ADP7182 Rev. I | Page 19 of 31 CH1 1V BW CH2 10mV B W M2µs A CH3 2.02V T 10.00% 1 2 T VOUT VIN Figure 69. Line Transient Response, 500 mV Step, VOUT = −5 V, ILOAD = −200 mA CH1 1V BW CH2 5mV B W M2µs A CH3 2.02V T 10.00% 1 2 T VOUT VIN Figure 70. Line Transient Response, 500 mV Step, VOUT = −5 V, ILOAD = −10 mA CH1 1V BW CH2 2mV B W M4µs A CH3 2.52V T 10.00% 1 2 T VOUT VIN Figure 71. Line Transient Response, 500 mV Step, VOUT = −15 V, Noise Reduction Network, ILOAD = −200 mA CH1 1V BW CH2 2mV B W M10µs A CH3 2.52V T 10.00% 1 2 T VOUT VIN Figure 72. Line Transient Response, 500 mV Step, VOUT = −15 V, Noise Reduction Network, ILOAD = −10 mA CH1 100mA BW CH2 50mV B W M40µs A CH1 –122mA T 10.40% 1 2 T VOUT LOAD CURRENT Figure 73. Load Transient Response, VOUT = −1.22 V, ILOAD = −1 mA to −200 mA, Load Step = 1 A/µs CH1 100mA BW CH2 50mV B W M40µs A CH1 –122mA T 10.60% 1 2 T VOUT LOAD CURRENT Figure 74. Load Transient Response, VOUT = −3 V, ILOAD = −1 mA to −200 mA, Load Step = 1 A/µs |
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