T89C5115-RATIM datasheet(85/105 Pages) ATMEL

No de pièce	T89C5115-RATIM

Description	Low Pin Count 8-bit MCU with A/D Converter and 16-Kbytes of Flash Memory

PDF	105 Pages

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Fabricant	ATMEL [ATMEL Corporation]

Site Internet	http://www.atmel.com

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85 / 105 page

T89C5115

4128A–8051–04/02

Table 60. Priority Level Bit Values

A low-priority interrupt can be interrupted by a high priority interrupt but not by another

low-priority interrupt. A high-priority interrupt cannot be interrupted by any other interrupt

source.

If two interrupt requests of different priority levels are received simultaneously, the

request of the higher priority level is serviced. If interrupt requests of the same priority

level are received simultaneously, an internal polling sequence determines which

request is serviced. Thus within each priority level there is a second priority structure

determined by the polling sequence, see Table 61.

Table 61. Interrupt Priority Within Level

IPH.x

IPL.x

Interrupt Level Priority

0 (Lowest)

3 (Highest)

Interrupt Name

Interrupt Address Vector

Priority Number

external interrupt (INT0)

0003h

Timer0 (TF0)

000Bh

external interrupt (INT1)

0013h

Timer1 (TF1)

001Bh

PCA (CF or CCFn)

0033h

UART (RI or TI)

0023h

Timer2 (TF2)

002Bh

ADC (ADCI)

0043h

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