LAN8742AI-CZ datasheet(120/124 Pages) MICROCHIP

120 / 124 page

LAN8742A/LAN8742Ai

DS00001989A-page 120

 2013-2015 Microchip Technology Inc.

Rev. 1.1

(05-21-13)

Section 4.3, "MDIO Manageable Device

(MMD) Registers"

Added additional vendor specific MMD register

descriptions

Section 4.3.7, "MAC Receive Address

A Register (RX_ADDRA)"

Added note

Section 4.3.8, "MAC Receive Address

B Register (RX_ADDRB)"

Added note

Section 4.3.9, "MAC Receive Address

C Register (RX_ADDRC)"

Added note

Section 5.1, "Absolute Maximum

Ratings*"

Changed: Positive voltage on XTAL1/CLKIN, with

respect to ground from “VDDCR” to “+3.6V”

Section 5.3, Table 5-1, “Package

Thermal Parameters”

Updated package thermal specification values

Section 5.4, "Power Consumption"

Updated power numbers

Section 5.5, "DC Specifications"

Changed VIHI max of ICLK Type Buffer from

“VDDCR” to “3.6”

Section 5.6, "AC Specifications"

Removed two RMII notes at beginning of section

Section 5.6.2, "Power Sequence

Timing"

Updated power sequencing requirements

Section 5.6.4, "RMII Interface Timing"

• Added note detailing CRS_DV behavior as both

carrier sense and data valid

• Split REF_CLK In and REF_CLK Out modes

into two subsections and updated RMII timing

tables

• Updated MII timing table

Rev. 1.0

(05-07-12)

Initial Release

REVISION LEVEL

& DATE

SECTION/FIGURE/ENTRY

CORRECTION

LAN8742Ai-CZ Fiches technique(PDF) 120 Page - Microchip Technology

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