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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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TLA5000 Fiches technique(PDF) 1 Page - List of Unclassifed Manufacturers |
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TLA5000 Fiches technique(HTML) 1 Page - List of Unclassifed Manufacturers |
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1 / 4 page  Features & Benefits 500 ps (2 GHz)/32 Mb Deep Memory Timing to Capture Intermittent Events Over a Wide Time Window 125 ps-resolution MagniVu™ Timing Simultaneous with State or Deep Memory Timing Acquisition to Find Elusive Timing Problems Quickly, Without Double Probing Glitch and Setup/Hold Violation Triggering and Display to Find and Display Elusive Hardware Problems 235 MHz State Acquisition Provides Analysis of High-speed Synchronous Digital Circuits iView™ Time-correlated Digital- analog View to Clearly See How Analog Anomalies are Affecting Your Digital Signals 34/68/102/136 Channel Configurations Offer Flexible Solutions to Fit Any Budget Applications Digital Hardware Verification and Debug Monitoring and Measurement of Digital Hardware Performance Single Microprocessor or Bus Debug TLA5000 Series Logic Analyzers TLA5201 • TLA5202 • TLA5203 • TLA5204 TLA5000 Series logic analyzers combine debug power with simplicity and affordability The affordable TLA5000 Series logic analyzers make high-speed timing resolution, fast state acquisition, deep memory and sophisticated triggering available to any digital designer who needs to identify initialization failures, operation crashes and intermittent oper- ation. For first-time as well as experienced logic analyzer users, the TLA5000 Series is ideal for single-bus timing and state analysis. An intuitive user interface, familiar Windows-based desktop and OpenChoice® networking and analysis features make the TLA5000 Series logic analyzers easy to network into your design environment. 500 ps timing resolution and 32 Mb memory depth with simultaneous 125 ps MagniVu timing resolution within each acquisition means you can measure digital signal timing on increasingly faster signals with confidence. With MagniVu timing resolution, find difficult problems such as digital logic errors, glitches, setup/hold violations and crosstalk quickly. Use setup/hold violation triggering and display to validate setup/hold performance of digital devices. Today, most designs can have both digital and analog anomalies. With iView time-correlated digital-analog view, you’ll clearly see how analog anomalies are affecting your digital signals—right on your logic analyzer display. |
Numéro de pièce similaire - TLA5000 |
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Description similaire - TLA5000 |
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