PCM4204PAPR datasheet(29/38 Pages) TI1

29 / 38 page

PCM4204

SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004

www.ti.com

PowerPAD PCB LAYOUT CONSIDERATIONS FOR

THE PCM4204

Figure 19 shows the recommended layer structure for

thermal management when using a PowerPad package

on a 4-layer printed circuit board design. Note that the

thermal pad is placed on both the top and bottom sides of

the board. The ground plane is utilized as the heat sink,

while the power plane is thermally isolated from the

thermal vias.

Figure 20 shows the required thermal pad etch pattern for

the 64-lead HTQFP package used for the PCM4204. Nine

13 mil (0.33 mm) thermal vias plated with 1 oz. copper are

placed within the thermal pad area for the purpose of

connecting the pad to the ground plane layer. The ground

plane is utilized as a heatsink in this application. It is very

important that the thermal via diameter be no larger than

13mils in order to avoid solder wicking during the reflow

process. Solder wicking results in thermal voids that

reduce heat dissipation efficiency and hampers heat flow

away from the IC die.

The via connections to the thermal pad and internal ground

plane should be plated completely around the hole, as

opposed to the typical web or spoke thermal relief

connection. Plating entirely around the thermal via

provides the most efficient thermal connection to the

ground plane.

ADDITIONAL PowerPAD PACKAGE

INFORMATION

Texas Instruments publishes the PowerPAD Thermally

Enhanced Package Application Report (TI literature

number SLMA002), available for download at www.ti.com,

which provides a more detailed discussion of PowerPAD

design and layout considerations. Before attempting a

board layout with the PCM4204, it is recommended that

the hardware engineer and/or layout designer be familiar

with the information contained in this document.

9/20/2004

13mils (0.33mm)

Package

Thermal Pad

Component

Traces

Thermal Via

Component (top) Side

Ground Plane

Power Plane

Solder (bottom) Side

Thermal Isolation

(power plane only)

Package

Thermal Pad

(bottom trace)

Figure 19. Recommended PCB Structure for a 4−Layer Board

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