VT82C596 datasheet(41/96 Pages) ETC

41 / 96 page

VT82C596B

Revision 0.3 June 17, 1999

-35-

PCI Function 0 Registers - PCI-to-ISA Bridge

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Function 0 Registers - PCI to ISA Bridge

All registers are located in the function 0 PCI configuration

space of the VT82C596B. These registers are accessed

through PCI configuration mechanism #1 via I/O address

CF8/CFC.

PCI Configuration Space Header

Offset 1-0 - Vendor ID = 1106h .........................................RO

Offset 3-2 - Device ID = 0596h ..........................................RO

Offset 5-4 - Command.......................................................RW

15-8 Reserved

........................................ always reads 0

Address / Data Stepping

Disable

Enable ....................................................default

6-4

Reserved

........................................ always reads 0

Special Cycle Enable ..... Normally RW†, default = 0

2Bus Master ........................................ always reads 1

Memory Space.................. Normally RO†, reads as 1

I/O Space

...................... Normally RO†, reads as 1

† If the test bit at offset 46 bit-4 is set, access to the above

indicated bits is reversed:

bit-3 above becomes read only

(reading back 1) and bits 0-1 above become read / write (with

a default of 1).

Offset 7-6 - Status ...........................................................RWC

Detected Parity Error .................... write one to clear

Signalled System Error...................... always reads 0

Signalled Master Abort ................. write one to clear

Received Target Abort .................. write one to clear

Signalled Target Abort .................. write one to clear

10-9 DEVSEL# Timing .................... fixed at 01 (medium)

Data Parity Detected.......................... always reads 0

Fast Back-to-Back Capable............... always reads 0

6-0

Reserved

........................................ always reads 0

Offset 8 - Revision ID = nn................................................ RO

7-0

Revision ID (00h is first silicon)

Offset 9 - Program Interface = 00h .................................. RO

Offset A - Sub Class Code = 01h....................................... RO

Offset B - Class Code = 06h .............................................. RO

Offset E - Header Type = 80h ........................................... RO

7-0

Header Type Code......... 80h (Multifunction Device)

Offset F - BIST = 00h ........................................................ RO

Offset 2F-2C - Subsystem ID ............................................ RO

Use offset 70-73 to change the value returned.

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