9535 datasheet(5/19 Pages) PHILIPS

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Philips Semiconductors

Product data

PCA9535

16-bit I2C and SMBus, low power I/O port with interrupt

2003 Jun 27

SIMPLIFIED SCHEMATIC OF I/Os

WRITE PULSE

DATA FROM

SHIFT REGISTER

VDD

I/O PIN

VSS

WRITE CONFIGURATION

PULSE

INPUT PORT

POLARITY

INVERSION

OUTPUT

PORT

DATA FROM

SHIFT REGISTER

DATA FROM

SHIFT REGISTER

WRITE

POLARITY

PULSE

CONFIGURATION

OUTPUT PORT

INPUT PORT

POLARITY

READ PULSE

SU01682

TO INT

NOTE:

At Power-on Reset, all registers return to default values.

Figure 4. Simplified schematic of I/Os

I/O port

When an I/O is configured as an input, FETs Q1 and Q2 are off,

creating a high impedance input. The input voltage may be raised

above VDD to a maximum of 5.5 V.

If the I/O is configured as an output, then either Q1 or Q2 is on,

depending on the state of the Output Port register. Care should be

exercised if an external voltage is applied to an I/O configured as an

output because of the low impedance path that exists between the

pin and either VDD or VSS.

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