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CLC533 Fiches technique(PDF) 1 Page - National Semiconductor (TI) |
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CLC533 Fiches technique(HTML) 1 Page - National Semiconductor (TI) |
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1 / 9 page ![]() Features s 12-bit settling (0.01%) – 17ns s Low noise – 42 µVrms s Isolation – 80dB @ 10MHz s 110MHz -3dB bandwidth (Av = +2) s Low distortion – 80dB @ 5MHz s Adjustable bandwidth – 180MHz (max) Applications s Infrared system multiplexing s CCD sensor signals s Radar I/Q switching s High definition video HDTV s Test and calibration Functional Diagram Pinout DIP & SOIC General Description The CLC533 is a high-speed 4:1 multiplexer employing active input and output stages. The CLC533 also employs a closed-loop design which dramatically improves accuracy over conventional analog multiplexer circuits. This monolithic device is constructed using an advanced high-performance bipolar process. The CLC533 has been specifically designed to provide a 24ns settling time to 0.01%. This coupled with the adjustable band- width, makes the CLC533 an ideal choice for infrared and CCD imaging systems, with channel-to-channel isolation of 80dB @ 10MHz. Low distortion and spurious signal levels (-80dBc) make the CLC533 a very suitable choice for I/Q processors in radar receivers. The CLC533 is offered over both the industrial and military tem- perature ranges. The industrial versions, CLC533AJP\AJE\AIB, are specified from -40°C to +85°C and are packaged in 16-pin plastic DIPs, SOIC’s and CERDIP packages. The extended tem- perature versions, CLC533A8B/A8L-2A, are specified from -55°C to +125°C and are packaged in 16-pin CERDIP and 20-terminal LCC packages. Ordering Information ... CLC533AJP -40°C to +85°C 16-pin plastic DIP CLC533AJE -40°C to +85°C 16-pin plastic SOIC CLC533ALC -40°C to +85°C dice CLC533A8B -55°C to +125°C 16-pin CERDIP, MIL-STD-883 CLC533AMC -40°C to +85°C dice, MIL-STD-833 CLC533A8L-2A -55°C to +125°C 20-terminal LCC, MIL-STD-883 Contact factory for other packages and DESC SMD number. CLC533 High-Speed 4:1 Analog Multiplexer N June 1999 A1 A0 OUT 00 A 01 B 10 C 11 D ECL Mode - DREF = open TTL Mode - DREF = +5V INA 3 GND 2 NC 1 OUTPUT 20 COMP1 19 GND 9 IND 10 NC 11 Vee 12 A1 13 14 15 16 17 18 8 7 6 5 4 © 1999 National Semiconductor Corporation http://www.national.com Printed in the U.S.A. |
Numéro de pièce similaire - CLC533 |
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Description similaire - CLC533 |
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