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STM32F303VE Fiches technique(PDF) 77 Page - STMicroelectronics |
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STM32F303VE Fiches technique(HTML) 77 Page - STMicroelectronics |
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77 / 184 page ![]() DocID026415 Rev 4 77/184 STM32F303xD STM32F303xE Electrical characteristics 161 Typical and maximum current consumption The MCU is placed under the following conditions: • All I/O pins are in input mode with a static value at VDD or VSS (no load) • All peripherals are disabled except when explicitly mentioned • The Flash memory access time is adjusted to the fHCLK frequency (0 wait state from 0 to 24 MHz,1 wait state from 24 to 48 MHz and 2 wait states from 48 to 72 MHz) • Prefetch in ON (reminder: this bit must be set before clock setting and bus prescaling) • When the peripherals are enabled fPCLK2 = fHCLK and fPCLK1 = fHCLK/2 • When fHCLK > 8 MHz, the PLL is ON and the PLL input is equal to HSI/2 (4 MHz) or HSE (8 MHz) in bypass mode. The parameters given in Table 25 to Table 29 are derived from tests performed under ambient temperature and supply voltage conditions summarized in Table 19. |
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