ADS5294IPFP datasheet(47/81 Pages) TI1

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ADS5294

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SLAS776D – NOVEMBER 2011 – REVISED SEPTEMBER 2015

Generally, INP pin represents the positive analog input pin, and INN represents the complementary negative

input. Setting the bits marked INVERT_CH<8:1> (individual control for each channel) causes the inputs to be

swapped. INN now represents the positive input, and INP the negative input.

9.6.1.4 LVDS Test Patterns

Table 10. LVDS Test Patterns

ADDR.

D15 D14 D13 D12 D11 D10

NAME

(HEX)

PRBS_SEED<15:0>

PRBS_SEED<22:16>

EN_RAMP

DUALCUSTOM_PAT

SINGLE_CUSTOM_PAT

BITS_CUSTOM1<13:12>

BITS_CUSTOM2<13:12>

TP_SOFT_SYNC

PRBS_TP_EN

PRBS_MODE_2

PRBS_SEED_FROM_REG

TP_HARD_SYNC

BITS_CUSTOM1<11:0>

BITS_CUSTOM2<11:0>

PAT_DESKEW

PAT_SYNC

The ADS5294 can output a variety of test patterns on the LVDS outputs. These test patterns replace the normal

ADC data output. All these patterns can be synchronized across devices by the sync function either through the

hardware SYNC pin or the software sync bit TP_SOFT_SYNC bit in register 0x25. When set, the

TP_HARD_SYNC bit enables the test patterns to be synchronized by the hardware SYNC Pin. When the

software sync bit TP_SOFT_SYNC is set, special timing is needed.

•

Setting EN_RAMP to '1' causes all the channels to output a repeating full-scale ramp pattern. The ramp

increments from zero code to full-scale code in steps of 1 LSB every clock cycle. After hitting the full-scale

code, it returns back to zero code and ramps again.

•

The device can also be programmed to output a constant code by setting SINGLE_CUSTOM_PAT to '1', and

programming the desired code in BITS_CUSTOM1<13:0>. In this mode, BITS_CUSTOM1<13:0> take the

place of the 14-bit ADC data at the output, and are controlled by LSB-first and MSB-first modes the same way

as normal ADC data are controlled.

•

The device can also toggle between two consecutive codes, by programming DUAL_CUSTOM_PAT to '1'.

The two codes are represented by the contents of BITS_CUSTOM1<13:0> and BITS_CUSTOM2<13:0>.

•

In addition to custom patterns, the device may also be made to output two preset patterns:

–

Deskew patten – Set using PAT_DESKEW, this mode replaces the 14-bit ADC output D<13:0> with the

0101010101010101 word.

–

Sync pattern – Set using PAT_SYNC, the normal ADC word is replaced by a fixed 11111110000000

word.

–

PRBS patterns – The device can give 9-bit or 23-bit LFSR Pseudo random pattern on the channel

outputs that are controlled by the register 0x25. To enable the PRBS pattern PRBS_TP_EN bit in the

PRBS_MODE_2 bit. The seed value for the PRBS patterns can be chosen by enabling the

PRBS_SEED_FROM_REG bit to 1 and the value written to the PRBS_SEED registers in 0x24 and 0x23.

NOTE

Only one of these patterns should be active at any given instant.

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