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EM3596-RTR Fiches technique(PDF) 56 Page - Silicon Laboratories

No de pièce EM3596-RTR
Description  High-Performance, Integrated ZigBee
PDF  59 Pages
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Fabricant  SILABS [Silicon Laboratories]
Site Internet  http://www.silabs.com
Logo SILABS - Silicon Laboratories

EM3596-RTR Fiches technique(HTML) 56 Page - Silicon Laboratories

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EM359x
56
Rev 1.0
Table 6.3. PCB Land Pattern
Dimension
Min
C1
7.89
C2
7.89
e
0.50
X1
0.26
Y1
0.84
X2
6.15
Y2
6.15
Notes:
General
1.
All dimensions shown are in millimeters (mm) unless otherwise noted.
2.
Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3.
This Land Pattern Design is based on the IPC-SM-782 guidelines.
Solder Mask Design
1.
All pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the metal pad is to be
60
m minimum, all the way around the pad.
Card Assembly
1.
A No-Clean, Type-3 solder paste is recommended.
2.
The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.



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