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FXLS8471Q Fiches technique(PDF) 73 Page - Freescale Semiconductor, Inc |
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FXLS8471Q Fiches technique(HTML) 73 Page - Freescale Semiconductor, Inc |
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73 / 75 page ![]() FXLS8471Q Sensors Freescale Semiconductor, Inc. 73 Appendix A A.1 Errata A.1.1 SPI Mode Soft-reset using CTRL_REG2 (0x2B), bit 6 Description: Following a soft-reset command, issued by setting CTRL_REG2[rst] = 1, certain device-specific parameters do not get updated correctly from NVM, causing inaccurate data output and incorrect WHOAMI (0x0D) register content. This behavior happens only in SPI mode. In I2C mode the device works as advertised. Workaround: Avoid using soft-reset in SPI mode by alternately utilizing the hardware RESET pin. |
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