AN2009 datasheet(24/39 Pages) STMICROELECTRONICS

24 / 39 page

24/39

PWM MANAGEMENT FOR 3-PHASE BLDC MOTOR DRIVES USING THE ST7MC

to detect the BEMF. So, in that case OS1 bit can be set or reset. It depends mainly on the

application and on the user.

MPHST register bits OO[5:0] are used to put the corresponding output channel active or not.

This has to be configured each step over the repetition of the six steps.

PHASE STATE REGISTER (MPHST)

Read/Write

Reset Value: 0000 0000 (00h)

Bits 5:0 =OO[5:0]*: Channel On/Off bits

These bits are used to switch channels on/off at the next commutation

0: Channel Off, the relevant switch is OFF, no PWM possible

1: Channel On the relevant switch is ON, PWM is possible

OO[5:0] Bit Meaning

* = Preload bits, new value taken into account at next C event

In addition to the PWM configuration flexibility, the ST7MC microcontroller features a dead

time generator embedded in the motor control peripheral. This is used mainly for the genera-

tion of the 3 sinewave 120° shifts for the drive of an AC induction 3-phase motor but it can be

used to perform “synchronous rectification” as explained in the next chapter when driving a

PM BLDC motor.

OO5*

OO4*

OO3*

OO2*

OO1*

OO0*

OO[5:0]

Output Channel State

Inactive

Active

AN2009 Fiches technique(PDF) 24 Page - STMicroelectronics