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AN2787 Fiches technique(PDF) 30 Page - STMicroelectronics |
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AN2787 Fiches technique(HTML) 30 Page - STMicroelectronics |
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30 / 37 page ![]() STEVAL-ISA050V1 evaluation tests AN2787 30/37 Figure 33. SW regulators phases, no phase shift - synchronous clock, SETPH1 pin tied to AVCC 10.7 Fault management (OVP, UVP, UVLO, thermal) Each switching regulator is able to detect the output overvoltage and undervoltage. When the OV is detected the high-side MOSFET is turned off and the low-side MOSFET is turned on. When the UV is detected, the power MOSFETs are both turned off and the discharge MOSFET is turned on (soft-end). The soft-end is also performed when the junction temperature is higher than 150 °C. Figure 34. VDDQ, VTT, VTTREF output voltage, VDDQ temporarily shorted to 3.3 V, output overvoltage protection triggered |
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