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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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UPD16337 Fiches technique(PDF) 5 Page - NEC |
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UPD16337 Fiches technique(HTML) 5 Page - NEC |
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5 / 16 page  µPD16337 5 TRUTH TABLE 1 (Shift Register Block) Input Output Shift Register R/L CLK A B H ↓ Input OutputNote 1 Right shift execution H H or L Output Hold L ↓ OutputNote 2 Input Left shift execution L H or L Output Hold Notes 1. The data of S57, S58, S59, S60 shifts to S61, S62, S63, S64 and is output from B1, B2, B3, B4 at the falling edge of the clock, respectively. 2. The data of S5, S6, S7, S8 shifts to S1, S2, S3, S4 and is output from A1, A2, A3, A4 at the falling edge of the clock, respectively. TRUTH TABLE 2 (Latch Block) LE CLK Output State of Latch Block (Ln) H ↑ Latch Sn data and hold output data ↓ Hold latch data L × Hold latch data TRUTH TABLE 3 (Driver Block) Ln BLK PC Output State of Driver Block × H H H (All driver outputs: H) × H L L (All driver outputs: L) × L H Output latch data (Ln) × L L Output reversed latch data (Ln) ×: H or L, H: High level, L: Low level |
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