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HM17CM256 Fiches technique(PDF) 55 Page - Hynix Semiconductor

No de pièce HM17CM256
Description  128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
PDF  111 Pages
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Fabricant  HYNIX [Hynix Semiconductor]
Site Internet  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HM17CM256 Fiches technique(HTML) 55 Page - Hynix Semiconductor

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HM17CM256
- 55 -
(34-5) Display start line register set
CS
RS
RD
WR
RE2
RE1
RE0
D7
D6
D5
D4
D3
D2
D1
D0
0
1
1
0
0
0
0
0
1
0
0
LA3
LA2
LA1
LA0
(reset:LA3~LA0=0H, read address:4H)
CS
RS
RD
WR
RE2
RE1
RE0
D7
D6
D5
D4
D3
D2
D1
D0
0
1
1
0
0
0
0
0
1
0
1
*
LA6
LA5
LA4
(reset:LA6~LA4=0H, read address:5H)
* : “Don’t care”
Setting the line address of COM0. The address stored at the start line register becomes display line at
COM0 line of LCD panel.
The display of LCD panel is done from line address value to the direction of increase.
LA6
LA5
LA4
LA3
LA2
LA1
LA0
Line address
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
:
:
:
:
1
0
0
1
1
1
1
79
(34-6) n line inversion register set
CS
RS
RD
WR
RE2
RE1
RE0
D7
D6
D5
D4
D3
D2
D1
D0
0
1
1
0
0
0
0
0
1
1
0
N3
N2
N1
N0
( reset :N3~N0=0H,
read address :6H)
CS
RS
RD
WR
RE2
RE1
RE0
D7
D6
D5
D4
D3
D2
D1
D0
0
1
1
0
0
0
0
0
1
1
1
*
N6
N5
N4
( reset :N6~N4=0H,
read address :7H)
* : “Don’t care”
Setting line number to be inversed to register.
Setting range is from 2 to 80.
N line inversion register
can be effective only when N line inversion command NLIN=‘1
”.
If NLIN=“0”, the polarity of LCD driving voltage is inverted by every other frame.
N6
N5
N4
N3
N2
N1
N0
Inversion line number
0
0
0
0
0
0
0
Forbidden *
0
0
0
0
0
0
1
2
:
:
:
:
1
0
0
1
1
1
1
80
n=N-1
* : N0~N6 =”0” is forbidden.



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