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TMD2772 Fiches technique(PDF) 7 Page - ams AG |
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TMD2772 Fiches technique(HTML) 7 Page - ams AG |
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7 / 35 page ![]() TMD2772 DIGITAL ALS and PROXIMITY MODULE TAOS147 E − DECEMBER 2012 6 r r Copyright E 2012, TAOS Inc. The LUMENOLOGY r Company www.taosinc.com Wait Characteristics, VDD = 3 V, TA = 255C, WEN = 1 (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Wait steps 1 256 steps Wait time WTIME = 0xFF (= 1 wait step) 2.73 2.9 ms AC Electrical Characteristics, VDD = 3 V, TA = 255C (unless otherwise noted) PARAMETER† TEST CONDITIONS MIN TYP MAX UNIT f(SCL) Clock frequency (I2C only) 0 400 kHz t(BUF) Bus free time between start and stop condition 1.3 μs t(HDSTA) Hold time after (repeated) start condition. After this period, the first clock is generated. 0.6 μs t(SUSTA) Repeated start condition setup time 0.6 μs t(SUSTO) Stop condition setup time 0.6 μs t(HDDAT) Data hold time 0 μs t(SUDAT) Data setup time 100 ns t(LOW) SCL clock low period 1.3 μs t(HIGH) SCL clock high period 0.6 μs tF Clock/data fall time 300 ns tR Clock/data rise time 300 ns Ci Input pin capacitance 10 pF † Specified by design and characterization; not production tested. |
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