AD7679 datasheet(24/28 Pages) AD

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AD7652

MICROPROCESSOR INTERFACING

The AD7652 is ideally suited for traditional dc measurement

applications supporting a microprocessor, and for ac signal

processing applications interfacing to a digital signal processor.

The AD7652 is designed to interface either with a parallel 8-bit

or 16-bit wide interface, or with a general-purpose serial port or

I/O ports on a microcontroller. A variety of external buffers can

be used with the AD7652 to prevent digital noise from coupling

into the ADC. The following section discusses the use of an

AD7652 with an ADSP-219x SPI equipped DSP.

SPI Interface (ADSP-219x)

Figure 37

Figure 37. Interfacing the AD7652 to an SPI Interface

shows an interface diagram between the AD7652 and

the SPI equipped ADSP-219x. To accommodate the slower

speed of the DSP, the AD7652 acts as a slave device and data

must be read after conversion. This mode also allows the daisy-

chain feature. The convert command can be initiated in

response to an internal timer interrupt. The reading process can

be initiated in response to the end-of-conversion signal (BUSY

going LOW) using an interrupt line of the DSP. The serial inter-

face (SPI) on the ADSP-219x is configured for master mode—

(MSTR) = 1, Clock Polarity bit (CPOL) = 0, Clock Phase bit

(CPHA) = 1, and SPI Interrupt Enable (TIMOD) = 00—by

writing to the SPI control register (SPICLTx). To meet all timing

requirements, the SPI clock should be limited to 17 Mbps, which

allows it to read an ADC result in less than 1 µs. When a higher

sampling rate is desired, use of one of the parallel interface

modes is recommended.

AD7652*

ADSP-219x*

SER/PAR

PFx

MISOx

SCKx

PFx or TFSx

BUSY

SDOUT

SCLK

CNVST

EXT/INT

INVSCLK

DVDD

* ADDITIONAL PINS OMITTED FOR CLARITY

SPIxSEL (PFx)

02965-0-021

Rev. 0 | Page 24 of 28

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