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ML2004IP Fiches technique(PDF) 6 Page - Fairchild Semiconductor

No de pièce ML2004IP
Description  Logarithmic Gain/Attenuator
PDF  11 Pages
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Fabricant  FAIRCHILD [Fairchild Semiconductor]
Site Internet  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

ML2004IP Fiches technique(HTML) 6 Page - Fairchild Semiconductor

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ML2003, ML2004
PRODUCT SPECIFICATION
6
REV. 1.1.1 3/19/01
Figure 6. CMSG S/N vs Gain Setting
Figure 7. Gain Error vs Gain Setting
GAIN SETTING (dB)
40
50
60
70
80
90
100
-24
-18
-12
-6
-0
6
12
18
24
GAIN SETTING (dB)
0
0.02
-0.02
-0.04
-0.06
-0.08
-1.0
0.04
0.06
0.08
0.1
-24
-18
-12
-6
-0
6
12
18
24
ATTEN: VIN = 8dBm
GAIN: VIN = 8dBm/GAIN SETTING
1KHz
Figure 8. S/N + D vs Gain Setting (VIN/VOUT = 2VRMS)
Figure 9. S/N + D vs Gain Setting (VIN/VOUT = 0.5VRMS)
80
70
60
50
40
30
20
10
-24
-18
-12
-6
0
GAIN SETTING (dB)
612
18
24
VIN = 1kHz
VIN = 20kHz
VIN = 50kHz
ATTEN: VIN = 2VRMS
GAIN: VIN = 2VRMS/GAIN SETTING
GAIN SETTING (dB)
80
70
60
50
40
30
20
-24
-18
-12
-6
0
6
12
18
24
VIN = 1kHz
VIN = 20kHz
VIN = 50kHz
ATTEN: VIN = 0.5VRMS
GAIN: VIN = 0.5VRMS/GAIN SETTING
Typical Performance Curves (continued)
Figure 4. Output Noise Voltage vs Frequency
Figure 5. CMSG Output Noise vs Gain Settings
2.0
1.8
FREQUENCY (Hz)
GAIN SETTING (dB)
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
10
-10
-9
-8
-7
-6
-5
-4
-3
-2
-24
-18
-12
-6
-0
6
12
18
24
100
1K
10K
GAIN = +24dB
VIN = 6
GAIN = -24dB
GAIN = +12dB



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